@GNU AS
@.CHARSET =CP1251 ( Cyrillic )

@.DESC     type=module
@ +------------------------------------------------------------------+
@ |       Константы Nested vectored interrupt controller (NVIC)      |
@ |                            CORTEX-M0                             |
@ +------------------------------------------------------------------+
@.ENDDESC

.INCLUDE            "/src/inc/base.inc"

@.ITEM     CORE
.EQU  NVIC_BASE     , CORE_BASE + 0xE100    @ NVIC
@.end

@.ITEM     NVIC_BASE
.EQU  NVIC_ISER     , 0x00     @  Interrupt set-enable registers (NVIC_ISER)
.EQU  NVIC_ICER     , 0x180    @  Interrupt clear-enable registers (NVIC_ICER)
.EQU  NVIC_ISPR     , 0x200    @  Interrupt set-pending registers (NVIC_ISPR)
.EQU  NVIC_ICPR     , 0x280    @  Interrupt clear-pending registers (NVIC_ICPR)
.EQU  NVIC_IPR0     , 0x400    @  Interrupt priority registers (NVIC_IPR0)
.EQU  NVIC_IPR1     , 0x404    @  Interrupt priority registers (NVIC_IPR1)
.EQU  NVIC_IPR2     , 0x408    @  Interrupt priority registers (NVIC_IPR2)
.EQU  NVIC_IPR3     , 0x40C    @  Interrupt priority registers (NVIC_IPR3)
.EQU  NVIC_IPR4     , 0x410    @  Interrupt priority registers (NVIC_IPR4)
.EQU  NVIC_IPR5     , 0x414    @  Interrupt priority registers (NVIC_IPR5)
.EQU  NVIC_IPR6     , 0x418    @  Interrupt priority registers (NVIC_IPR6)
.EQU  NVIC_IPR7     , 0x41C    @  Interrupt priority registers (NVIC_IPR7)
@.END

@.ITEM     NVIC_ISER
.EQU  NVIC_ISER_INT0, 1 << 0    @  Enable interrupt 0
.EQU  NVIC_ISER_INT1, 1 << 1    @  Enable interrupt 1
.EQU  NVIC_ISER_INT2, 1 << 2    @  Enable interrupt 2
.EQU  NVIC_ISER_INT3, 1 << 3    @  Enable interrupt 3
.EQU  NVIC_ISER_INT4, 1 << 4    @  Enable interrupt 4
.EQU  NVIC_ISER_INT5, 1 << 5    @  Enable interrupt 5
.EQU  NVIC_ISER_INT6, 1 << 6    @  Enable interrupt 6
.EQU  NVIC_ISER_INT7, 1 << 7    @  Enable interrupt 7
.EQU  NVIC_ISER_INT8, 1 << 8    @  Enable interrupt 8
.EQU  NVIC_ISER_INT9, 1 << 9    @  Enable interrupt 9
.EQU  NVIC_ISER_INT10, 1 << 10    @  Enable interrupt 10
.EQU  NVIC_ISER_INT11, 1 << 11    @  Enable interrupt 11
.EQU  NVIC_ISER_INT12, 1 << 12    @  Enable interrupt 12
.EQU  NVIC_ISER_INT13, 1 << 13    @  Enable interrupt 13
.EQU  NVIC_ISER_INT14, 1 << 14    @  Enable interrupt 14
.EQU  NVIC_ISER_INT15, 1 << 15    @  Enable interrupt 15
.EQU  NVIC_ISER_INT16, 1 << 16    @  Enable interrupt 16
.EQU  NVIC_ISER_INT17, 1 << 17    @  Enable interrupt 17
.EQU  NVIC_ISER_INT18, 1 << 18    @  Enable interrupt 18
.EQU  NVIC_ISER_INT19, 1 << 19    @  Enable interrupt 19
.EQU  NVIC_ISER_INT20, 1 << 20    @  Enable interrupt 20
.EQU  NVIC_ISER_INT21, 1 << 21    @  Enable interrupt 21
.EQU  NVIC_ISER_INT22, 1 << 22    @  Enable interrupt 22
.EQU  NVIC_ISER_INT23, 1 << 23    @  Enable interrupt 23
.EQU  NVIC_ISER_INT24, 1 << 24    @  Enable interrupt 24
.EQU  NVIC_ISER_INT25, 1 << 25    @  Enable interrupt 25
.EQU  NVIC_ISER_INT26, 1 << 26    @  Enable interrupt 26
.EQU  NVIC_ISER_INT27, 1 << 27    @  Enable interrupt 27
.EQU  NVIC_ISER_INT28, 1 << 28    @  Enable interrupt 28
.EQU  NVIC_ISER_INT29, 1 << 29    @  Enable interrupt 29
.EQU  NVIC_ISER_INT30, 1 << 30    @  Enable interrupt 30
.EQU  NVIC_ISER_INT31, 1 << 31    @  Enable interrupt 31
@.END

@.ITEM     NVIC_ICER
.EQU  NVIC_ICER_INT0, 1 << 0    @   Disable interrupt 0
.EQU  NVIC_ICER_INT1, 1 << 1    @   Disable interrupt 1
.EQU  NVIC_ICER_INT2, 1 << 2    @   Disable interrupt 2
.EQU  NVIC_ICER_INT3, 1 << 3    @   Disable interrupt 3
.EQU  NVIC_ICER_INT4, 1 << 4    @   Disable interrupt 4
.EQU  NVIC_ICER_INT5, 1 << 5    @   Disable interrupt 5
.EQU  NVIC_ICER_INT6, 1 << 6    @   Disable interrupt 6
.EQU  NVIC_ICER_INT7, 1 << 7    @   Disable interrupt 7
.EQU  NVIC_ICER_INT8, 1 << 8    @   Disable interrupt 8
.EQU  NVIC_ICER_INT9, 1 << 9    @   Disable interrupt 9
.EQU  NVIC_ICER_INT10, 1 << 10    @   Disable interrupt 10
.EQU  NVIC_ICER_INT11, 1 << 11    @   Disable interrupt 11
.EQU  NVIC_ICER_INT12, 1 << 12    @   Disable interrupt 12
.EQU  NVIC_ICER_INT13, 1 << 13    @   Disable interrupt 13
.EQU  NVIC_ICER_INT14, 1 << 14    @   Disable interrupt 14
.EQU  NVIC_ICER_INT15, 1 << 15    @   Disable interrupt 15
.EQU  NVIC_ICER_INT16, 1 << 16    @   Disable interrupt 16
.EQU  NVIC_ICER_INT17, 1 << 17    @   Disable interrupt 17
.EQU  NVIC_ICER_INT18, 1 << 18    @   Disable interrupt 18
.EQU  NVIC_ICER_INT19, 1 << 19    @   Disable interrupt 19
.EQU  NVIC_ICER_INT20, 1 << 20    @   Disable interrupt 20
.EQU  NVIC_ICER_INT21, 1 << 21    @   Disable interrupt 21
.EQU  NVIC_ICER_INT22, 1 << 22    @   Disable interrupt 22
.EQU  NVIC_ICER_INT23, 1 << 23    @   Disable interrupt 23
.EQU  NVIC_ICER_INT24, 1 << 24    @   Disable interrupt 24
.EQU  NVIC_ICER_INT25, 1 << 25    @   Disable interrupt 25
.EQU  NVIC_ICER_INT26, 1 << 26    @   Disable interrupt 26
.EQU  NVIC_ICER_INT27, 1 << 27    @   Disable interrupt 27
.EQU  NVIC_ICER_INT28, 1 << 28    @   Disable interrupt 28
.EQU  NVIC_ICER_INT29, 1 << 29    @   Disable interrupt 29
.EQU  NVIC_ICER_INT30, 1 << 30    @   Disable interrupt 30
.EQU  NVIC_ICER_INT31, 1 << 31    @   Disable interrupt 31
@.END

@.ITEM     NVIC_ISPR
.EQU  NVIC_ISPR_INT0, 1 << 0    @  Changes interrupt state to pending 0
.EQU  NVIC_ISPR_INT1, 1 << 1    @  Changes interrupt state to pending 1
.EQU  NVIC_ISPR_INT2, 1 << 2    @  Changes interrupt state to pending 2
.EQU  NVIC_ISPR_INT3, 1 << 3    @  Changes interrupt state to pending 3
.EQU  NVIC_ISPR_INT4, 1 << 4    @  Changes interrupt state to pending 4
.EQU  NVIC_ISPR_INT5, 1 << 5    @  Changes interrupt state to pending 5
.EQU  NVIC_ISPR_INT6, 1 << 6    @  Changes interrupt state to pending 6
.EQU  NVIC_ISPR_INT7, 1 << 7    @  Changes interrupt state to pending 7
.EQU  NVIC_ISPR_INT8, 1 << 8    @  Changes interrupt state to pending 8
.EQU  NVIC_ISPR_INT9, 1 << 9    @  Changes interrupt state to pending 9
.EQU  NVIC_ISPR_INT10, 1 << 10    @  Changes interrupt state to pending 10
.EQU  NVIC_ISPR_INT11, 1 << 11    @  Changes interrupt state to pending 11
.EQU  NVIC_ISPR_INT12, 1 << 12    @  Changes interrupt state to pending 12
.EQU  NVIC_ISPR_INT13, 1 << 13    @  Changes interrupt state to pending 13
.EQU  NVIC_ISPR_INT14, 1 << 14    @  Changes interrupt state to pending 14
.EQU  NVIC_ISPR_INT15, 1 << 15    @  Changes interrupt state to pending 15
.EQU  NVIC_ISPR_INT16, 1 << 16    @  Changes interrupt state to pending 16
.EQU  NVIC_ISPR_INT17, 1 << 17    @  Changes interrupt state to pending 17
.EQU  NVIC_ISPR_INT18, 1 << 18    @  Changes interrupt state to pending 18
.EQU  NVIC_ISPR_INT19, 1 << 19    @  Changes interrupt state to pending 19
.EQU  NVIC_ISPR_INT20, 1 << 20    @  Changes interrupt state to pending 20
.EQU  NVIC_ISPR_INT21, 1 << 21    @  Changes interrupt state to pending 21
.EQU  NVIC_ISPR_INT22, 1 << 22    @  Changes interrupt state to pending 22
.EQU  NVIC_ISPR_INT23, 1 << 23    @  Changes interrupt state to pending 23
.EQU  NVIC_ISPR_INT24, 1 << 24    @  Changes interrupt state to pending 24
.EQU  NVIC_ISPR_INT25, 1 << 25    @  Changes interrupt state to pending 25
.EQU  NVIC_ISPR_INT26, 1 << 26    @  Changes interrupt state to pending 26
.EQU  NVIC_ISPR_INT27, 1 << 27    @  Changes interrupt state to pending 27
.EQU  NVIC_ISPR_INT28, 1 << 28    @  Changes interrupt state to pending 28
.EQU  NVIC_ISPR_INT29, 1 << 29    @  Changes interrupt state to pending 29
.EQU  NVIC_ISPR_INT30, 1 << 30    @  Changes interrupt state to pending 30
.EQU  NVIC_ISPR_INT31, 1 << 31    @  Changes interrupt state to pending 31
@.END

@.ITEM     NVIC_ICPR
.EQU  NVIC_ICPR_INT0, 1 << 0    @   Removes the pending state of an interrupt  0
.EQU  NVIC_ICPR_INT1, 1 << 1    @   Removes the pending state of an interrupt  1
.EQU  NVIC_ICPR_INT2, 1 << 2    @   Removes the pending state of an interrupt  2
.EQU  NVIC_ICPR_INT3, 1 << 3    @   Removes the pending state of an interrupt  3
.EQU  NVIC_ICPR_INT4, 1 << 4    @   Removes the pending state of an interrupt  4
.EQU  NVIC_ICPR_INT5, 1 << 5    @   Removes the pending state of an interrupt  5
.EQU  NVIC_ICPR_INT6, 1 << 6    @   Removes the pending state of an interrupt  6
.EQU  NVIC_ICPR_INT7, 1 << 7    @   Removes the pending state of an interrupt  7
.EQU  NVIC_ICPR_INT8, 1 << 8    @   Removes the pending state of an interrupt  8
.EQU  NVIC_ICPR_INT9, 1 << 9    @   Removes the pending state of an interrupt  9
.EQU  NVIC_ICPR_INT10, 1 << 10    @   Removes the pending state of an interrupt  10
.EQU  NVIC_ICPR_INT11, 1 << 11    @   Removes the pending state of an interrupt  11
.EQU  NVIC_ICPR_INT12, 1 << 12    @   Removes the pending state of an interrupt  12
.EQU  NVIC_ICPR_INT13, 1 << 13    @   Removes the pending state of an interrupt  13
.EQU  NVIC_ICPR_INT14, 1 << 14    @   Removes the pending state of an interrupt  14
.EQU  NVIC_ICPR_INT15, 1 << 15    @   Removes the pending state of an interrupt  15
.EQU  NVIC_ICPR_INT16, 1 << 16    @   Removes the pending state of an interrupt  16
.EQU  NVIC_ICPR_INT17, 1 << 17    @   Removes the pending state of an interrupt  17
.EQU  NVIC_ICPR_INT18, 1 << 18    @   Removes the pending state of an interrupt  18
.EQU  NVIC_ICPR_INT19, 1 << 19    @   Removes the pending state of an interrupt  19
.EQU  NVIC_ICPR_INT20, 1 << 20    @   Removes the pending state of an interrupt  20
.EQU  NVIC_ICPR_INT21, 1 << 21    @   Removes the pending state of an interrupt  21
.EQU  NVIC_ICPR_INT22, 1 << 22    @   Removes the pending state of an interrupt  22
.EQU  NVIC_ICPR_INT23, 1 << 23    @   Removes the pending state of an interrupt  23
.EQU  NVIC_ICPR_INT24, 1 << 24    @   Removes the pending state of an interrupt  24
.EQU  NVIC_ICPR_INT25, 1 << 25    @   Removes the pending state of an interrupt  25
.EQU  NVIC_ICPR_INT26, 1 << 26    @   Removes the pending state of an interrupt  26
.EQU  NVIC_ICPR_INT27, 1 << 27    @   Removes the pending state of an interrupt  27
.EQU  NVIC_ICPR_INT28, 1 << 28    @   Removes the pending state of an interrupt  28
.EQU  NVIC_ICPR_INT29, 1 << 29    @   Removes the pending state of an interrupt  29
.EQU  NVIC_ICPR_INT30, 1 << 30    @   Removes the pending state of an interrupt  30
.EQU  NVIC_ICPR_INT31, 1 << 31    @   Removes the pending state of an interrupt  31
@.END


@.ITEM     NVIC_IPR0
.EQU  NVIC_IPR0_IP0_N, 0       @ Interrupt 0 priority field
.EQU  NVIC_IPR0_IP1_N, 8       @ Interrupt 1 priority field
.EQU  NVIC_IPR0_IP2_N, 16      @ Interrupt 2 priority field
.EQU  NVIC_IPR0_IP3_N, 24      @ Interrupt 3 priority field
@.end

@.ITEM     NVIC_IPR1
.EQU  NVIC_IPR1_IP4_N, 0       @ Interrupt 4 priority field
.EQU  NVIC_IPR1_IP5_N, 8       @ Interrupt 5 priority field
.EQU  NVIC_IPR1_IP6_N, 16      @ Interrupt 6 priority field
.EQU  NVIC_IPR1_IP7_N, 24      @ Interrupt 7 priority field
@.end

@.ITEM     NVIC_IPR2
.EQU  NVIC_IPR2_IP8_N, 0       @ Interrupt 8 priority field
.EQU  NVIC_IPR2_IP9_N, 8       @ Interrupt 9 priority field
.EQU  NVIC_IPR2_IP10_N, 16      @ Interrupt 10 priority field
.EQU  NVIC_IPR2_IP11_N, 24      @ Interrupt 11 priority field
@.end

@.ITEM     NVIC_IPR3
.EQU  NVIC_IPR3_IP12_N, 0       @ Interrupt 12 priority field
.EQU  NVIC_IPR3_IP13_N, 8       @ Interrupt 13 priority field
.EQU  NVIC_IPR3_IP14_N, 16      @ Interrupt 14 priority field
.EQU  NVIC_IPR3_IP15_N, 24      @ Interrupt 15 priority field
@.end

@.ITEM     NVIC_IPR4
.EQU  NVIC_IPR4_IP16_N, 0       @ Interrupt 16 priority field
.EQU  NVIC_IPR4_IP17_N, 8       @ Interrupt 17 priority field
.EQU  NVIC_IPR4_IP18_N, 16      @ Interrupt 18 priority field
.EQU  NVIC_IPR4_IP19_N, 24      @ Interrupt 19 priority field
@.end

@.ITEM     NVIC_IPR5
.EQU  NVIC_IPR5_IP20_N, 0       @ Interrupt 20 priority field
.EQU  NVIC_IPR5_IP21_N, 8       @ Interrupt 21 priority field
.EQU  NVIC_IPR5_IP22_N, 16      @ Interrupt 22 priority field
.EQU  NVIC_IPR5_IP23_N, 24      @ Interrupt 23 priority field
@.end

@.ITEM     NVIC_IPR6
.EQU  NVIC_IPR6_IP24_N, 0       @ Interrupt 24 priority field
.EQU  NVIC_IPR6_IP25_N, 8       @ Interrupt 25 priority field
.EQU  NVIC_IPR6_IP26_N, 16      @ Interrupt 26 priority field
.EQU  NVIC_IPR6_IP27_N, 24      @ Interrupt 27 priority field
@.end

@.ITEM     NVIC_IPR7
.EQU  NVIC_IPR7_IP28_N, 0       @ Interrupt 28 priority field
.EQU  NVIC_IPR7_IP29_N, 8       @ Interrupt 29 priority field
.EQU  NVIC_IPR7_IP30_N, 16      @ Interrupt 30 priority field
.EQU  NVIC_IPR7_IP31_N, 24      @ Interrupt 31 priority field
@.end


