@.CHARSET =CP1251 ( Cyrillic )
@GNU AS


.include "/src/inc/base.inc"

@.ITEM     APB1PERIPH_BASE
.EQU  CEC_BASE           , APB1PERIPH_BASE + 0x7800
.EQU  CEC                , PERIPH_BASE + CEC_BASE

@.ITEM     CEC_BASE CEC
.EQU  CEC_CFGR           , 0x00                    @ Configuration register (CEC_CFGR)
.EQU  CEC_OAR            , 0x04                    @ Own address register (CEC_OAR)
.EQU  CEC_PRES           , 0x08                    @ Prescaler register (CEC_PRES)
.EQU  CEC_ESR            , 0x0C                    @ Error status register (CEC_ESR)
.EQU  CEC_CSR            , 0x10                    @ Control and status register (CEC_CSR)
.EQU  CEC_TXD            , 0x14                    @ Tx data register (CEC_TXD)
.EQU  CEC_RXD            , 0x18                    @ Rx data register (CEC_RXD)


@.ITEM     CEC_CFGR
.EQU  CEC_CFGR_RSTVAL    , 0x00000000              @ Reset value: 0x0000 0000
.EQU  CEC_CFGR_BPEM      , 1 << 3                  @ Bit 3 BPEM: Bit period error mode
.EQU  CEC_CFGR_BTEM      , 1 << 2                  @ Bit 2 BTEM: Bit timing error mode
.EQU  CEC_CFGR_IE        , 1 << 1                  @ Bit 1 IE: Interrupt enable
.EQU  CEC_CFGR_PE        , 1                       @ Bit 0 PE: Peripheral enable

@.ITEM     CEC_OAR
.EQU  CEC_OAR_OA_N       , 0
.EQU  CEC_OAR_OA_M       , 0xF                     @ Bits 3:0 OA[3:0]: Own address

@.ITEM     CEC_PRES
.EQU  CEC_PRES_N         , 0
.EQU  CEC_PRES_M         , 0x1FFF                  @ Bits 13:0 OA[13:0]: Prescaler counter value

@.ITEM     CEC_ESR
.EQU  CEC_ESR_TBTFE      , 1 << 6                  @ Bit 6 TBTFE: Tx block transfer finished error
.EQU  CEC_ESR_LINE       , 1 << 5                  @ Bit 5 LINE: Line error
.EQU  CEC_ESR_ACKE       , 1 << 4                  @ Bit 4 ACKE: Block acknowledge error
.EQU  CEC_ESR_SBE        , 1 << 3                  @ Bit 3 SBE: Start bit error
.EQU  CEC_ESR_RBTFE      , 1 << 2                  @ Bit 2 RTBFE: Rx block transfer finished error
.EQU  CEC_ESR_BPE        , 1 << 1                  @ Bit 1 BPE: Bit period error
.EQU  CEC_ESR_BTE        , 1 << 0                  @ Bit 0 BTE: Bit timing error

@.ITEM     CEC_CSR
.EQU  CEC_CSR_RBTF       , 1 << 7                  @ Bit 7 RBTF: Rx byte/block transfer finished
.EQU  CEC_CSR_RERR       , 1 << 6                  @ Bit 6 RERR: Rx error
.EQU  CEC_CSR_REOM       , 1 << 5                  @ Bit 5 REOM: Rx end of message
.EQU  CEC_CSR_RSOM       , 1 << 4                  @ Bit 4 RSOM: Rx start of message
.EQU  CEC_CSR_TBTRF      , 1 << 3                  @ Bit 3 TBTRF: Tx byte transfer request or block transfer finished
.EQU  CEC_CSR_TERR       , 1 << 2                  @ Bit 2 TERR: Tx error
.EQU  CEC_CSR_TEOM       , 1 << 1                  @ Bit 1 TEOM: Tx end of message
.EQU  CEC_CSR_TSOM       , 1 << 0                  @ Bit 0 TSOM: Tx start of message

@.ITEM     CEC_TXD
.EQU  CEC_TXD_M          , 0xFF                   @ Bits 7:0 TXD[7:0]: Tx Data register.

@.ITEM     CEC_RXD
.EQU  CEC_RXD_M          , 0xFF                   @ Bits 7:0 RXD[7:0]: Rx Data register.


