@.CharSet=CP1251 (Cyrillic)
@GNU AS

@.desc type=module
@ +------------------------------------------------------------------+
@ |                    Базовые константы SYSCFG                      |
@ |               для stm32f42xxx и stm32f43xxx                |
@ +------------------------------------------------------------------+
@.enddesc

.include "/src/inc/base.inc"

.equ SYSCFG_BASE                , APB2PERIPH_BASE + 0x3800

@.ITEM     SYSCFG_BASE
.equ SYSCFG_MEMRMP              , 0x00 @ SYSCFG memory remap register (SYSCFG_MEMRMP)
.equ SYSCFG_PMC                 , 0x04 @ SYSCFG peripheral mode configuration register (SYSCFG_PMC)
.equ SYSCFG_EXTICR1             , 0x08 @ SYSCFG external interrupt configuration register 1 (SYSCFG_EXTICR1)
.equ SYSCFG_EXTICR2             , 0x0C @ SYSCFG external interrupt configuration register 2 (SYSCFG_EXTICR2)
.equ SYSCFG_EXTICR3             , 0x10 @ SYSCFG external interrupt configuration register 3 (SYSCFG_EXTICR3)
.equ SYSCFG_EXTICR4             , 0x14 @ SYSCFG external interrupt configuration register 4 (SYSCFG_EXTICR4)
.equ SYSCFG_CMPCR               , 0x20 @ Compensation cell control register (SYSCFG_CMPCR)
.equ SYSCFG_EXTICR_VALUES       , 0    @ значение для SYSCFG_EXTICRx
@.end

@.ITEM     SYSCFG_MEMRMP
.EQU  SYSCFG_MEMRMP_MEM_MODE_N     , 0     @ Bits 2:0 MEM_MODE:
.EQU  SYSCFG_MEMRMP_MEM_MODE_M     , 0x00000007    @ SYSCFG_Memory Remap Config
.EQU  SYSCFG_MEMRMP_MEM_MODE_0     , 0x00000001    @ Bit 0
.EQU  SYSCFG_MEMRMP_MEM_MODE_1     , 0x00000002    @ Bit 1
.EQU  SYSCFG_MEMRMP_MEM_MODE_2     , 0x00000004    @ Bit 2
.EQU  SYSCFG_MEMRMP_FB_MODE_N      , 8     @ Bit 8 FB_MODE:
.EQU  SYSCFG_MEMRMP_FB_MODE_M      , 0x00000100    @ User Flash Bank mode
.EQU  SYSCFG_MEMRMP_SWP_FMC_N      , 10    @ Bits 11:10 SWP_FMC:
.EQU  SYSCFG_MEMRMP_SWP_FMC_M      , 0x00000C00    @ FMC memory mapping swap
.EQU  SYSCFG_MEMRMP_SWP_FMC_0      , 0x00000400    @ Bit 0
.EQU  SYSCFG_MEMRMP_SWP_FMC_1      , 0x00000800    @ Bit 1
@.END

@.item SYSCFG_PMC
.EQU  SYSCFG_PMC_ADCxDC2_N         , 16    @ Bits 18:16 ADCxDC2:
.EQU  SYSCFG_PMC_ADCxDC2_0         , 0x00010000
.EQU  SYSCFG_PMC_ADCxDC2_1         , 0x00020000
.EQU  SYSCFG_PMC_ADCxDC2_2         , 0x00040000
.EQU  SYSCFG_PMC_MII_RMII_SEL_N    , 23    @ Bit 23 MII_RMII_SEL: Ethernet PHY interface selection
.EQU  SYSCFG_PMC_MII_RMII_SEL_0    , 0 << 23    @ 0: MII interface is selected
.EQU  SYSCFG_PMC_MII_RMII_SEL_1    , 1 << 23    @ 1: RMII PHY interface is selected                                   ,          1 << 16 @ Bit 16 ADCxDC2 = 1: Refer to AN4073 on how to use this bit
@.end

@.ITEM     SYSCFG_EXTICR1
.EQU  SYSCFG_EXTICR1_EXTI0_N       , 0     @ Bits 15:0 EXTIx[3:0]: EXTI x configuration (x = 0 to 3)
.EQU  SYSCFG_EXTICR1_EXTI1_N       , 4
.EQU  SYSCFG_EXTICR1_EXTI2_N       , 8
.EQU  SYSCFG_EXTICR1_EXTI3_N       , 12
@.END

@.ITEM     SYSCFG_EXTICR2
.EQU  SYSCFG_EXTICR2_EXTI4_N       , 0
.EQU  SYSCFG_EXTICR2_EXTI5_N       , 4
.EQU  SYSCFG_EXTICR2_EXTI6_N       , 8
.EQU  SYSCFG_EXTICR2_EXTI7_N       , 12
@.END

@.ITEM     SYSCFG_EXTICR3
.EQU  SYSCFG_EXTICR3_EXTI8_N       , 0     @ Note: PK[11:8] are not used.
.EQU  SYSCFG_EXTICR3_EXTI9_N       , 4
.EQU  SYSCFG_EXTICR3_EXTI10_N      , 8
.EQU  SYSCFG_EXTICR3_EXTI11_N      , 12
@.END

@.ITEM     SYSCFG_EXTICR4
.EQU  SYSCFG_EXTICR4_EXTI12_N      , 0
.EQU  SYSCFG_EXTICR4_EXTI13_N      , 4
.EQU  SYSCFG_EXTICR4_EXTI14_N      , 8
.EQU  SYSCFG_EXTICR4_EXTI15_N      , 12    @ Note: PK[15:12] are not used.
@.END

@.ITEM     SYSCFG_EXTICR_VALUES
.EQU  SYSCFG_EXTICR_EXTI_PA        , 0
.EQU  SYSCFG_EXTICR_EXTI_PB        , 1
.EQU  SYSCFG_EXTICR_EXTI_PC        , 2
.EQU  SYSCFG_EXTICR_EXTI_PD        , 3
.EQU  SYSCFG_EXTICR_EXTI_PE        , 4
.EQU  SYSCFG_EXTICR_EXTI_PF        , 5
.EQU  SYSCFG_EXTICR_EXTI_PG        , 6
.EQU  SYSCFG_EXTICR_EXTI_PH        , 7
.EQU  SYSCFG_EXTICR_EXTI_PI        , 8
.EQU  SYSCFG_EXTICR_EXTI_PJ        , 9
.EQU  SYSCFG_EXTICR_EXTI_PK        , 10
@.END

@.ITEM     SYSCFG_CMPCR
.EQU  SYSCFG_CMPCR_READY_N         , 0           @ Bit 8 READY: Compensation cell ready flag
.EQU  SYSCFG_CMPCR_READY           , 1 << 8      @ Bit 8 READY: Compensation cell ready flag
.EQU  SYSCFG_CMPCR_CMP_PD_N        , 0           @ Bit 0 CMP_PD: Compensation cell power-down
.EQU  SYSCFG_CMPCR_CMP_PD          , 1           @ Bit 0 CMP_PD: Compensation cell power-down
@.END

