@GNU AS
@.CharSet=CP1251 (Cyrillic)
@.desc type=module
@ +------------------------------------------------------------------+
@ |                     Базовые константы PWR                        |
@ |                           STM32F303                              |
@ +------------------------------------------------------------------+
@.enddesc


.include "/src/inc/base.inc"

@.item APB1PERIPH_BASE
.equ PWR_BASE            , (APB1PERIPH_BASE + 0x7000)
@.end

@.item PWR_BASE
.equ PWR_CR              , 0x00
.equ PWR_CSR             , 0x04
@.end

@.item PWR_CR
.equ PWR_CR_RST_VAL      , 0x00000000 @ значение по умолчанию
.equ PWR_CR_LPDS_N       , 0
.equ PWR_CR_LPDS         , 0x01     @ Bit 0 LPDS: Low-power deepsleep
.equ PWR_CR_PDDs_N       , 1
.equ PWR_CR_PDDS         , 0x02     @ Bit 1 PDDS: Power-down deepsleep
.equ PWR_CR_CWUF_N       , 2
.equ PWR_CR_CWUF         , 0x04     @ Bit 2 CWUF: Clear wakeup flag
.equ PWR_CR_CSBF_N       , 3
.equ PWR_CR_CSBF         , 0x08     @ Bit 3 CSBF: Clear standby flag
.equ PWR_CR_PVDE_N       , 4
.equ PWR_CR_PVDE         , 0x10     @ Bit 4 PVDE: Power voltage detector enable
.equ PWR_CR_PLS_N        , 5        @ Bits 7:5 PLS[2:0]: PVD level selection
.equ PWR_CR_PLS_2D0V     , 0<<5
.equ PWR_CR_PLS_2D1V     , 1<<5
.equ PWR_CR_PLS_2D3V     , 2<<5
.equ PWR_CR_PLS_2D5V     , 3<<5
.equ PWR_CR_PLS_2D6V     , 4<<5
.equ PWR_CR_PLS_2D7V     , 5<<5
.equ PWR_CR_PLS_2D8V     , 6<<5
.equ PWR_CR_PLS_2D9V     , 7<<5
.equ PWR_CR_DBP_N        , 8
.equ PWR_CR_DBP          , 0x01<<8   @ Bit 8 DBP: Disable backup domain write protection
@.end

@.item PWR_CSR
.equ PWR_CSR_EWUP3       , 0x01<<10  @ Bit 8 EWUP3: Enable WKUP3 pin
.equ PWR_CSR_EWUP2       , 0x01<<9   @ Bit 8 EWUP2: Enable WKUP2 pin
.equ PWR_CSR_EWUP1       , 0x01<<8   @ Bit 8 EWUP1: Enable WKUP1 pin
.equ PWR_CSR_VREFINTRDYF , 0x01<<3   @ Bit 3 VREFINTRDYF: VREFINT Ready. Read Only. This bit indicates the state of the internal reference voltage. It is set when VREFINT is ready. It is reset during stabilization of VREFINT.
.equ PWR_CSR_PVDO        , 0x01<<2   @ Bit 2 PVDO: PVD output
.equ PWR_CSR_SBF         , 0x01<<1   @ Bit 1 SBF: Standby flag
.equ PWR_CSR_WUF         , 0x01      @ Bit 0 WUF: Wakeup flag
@.end
