@GNU AS
@.CHARSET =CP1251 ( Cyrillic )
@.DESC     type=module
@ +------------------------------------------------------------------+
@ |                Базовые константы микроконтроллера                |
@ |                     STM32F429xx                                  |
@ +------------------------------------------------------------------+
@.ENDDESC

@ базовые константы микроконтроллера
@addtogroup Peripheral_memory_map
@.ITEM     STM32F429xx
.EQU  FLASH_BASE         , 0x08000000    @ FLASH(up to 2 MB) base address in the alias region                         */
.EQU  CCMDATARAM_BASE    , 0x10000000    @ CCM(core coupled memory) data RAM(64 KB) base address in the alias region  */
.EQU  SRAM1_BASE         , 0x20000000    @ SRAM1(112 KB) base address in the alias region                              */
.EQU  SRAM2_BASE         , 0x2001C000    @ SRAM2(16 KB) base address in the alias region                              */
.EQU  SRAM3_BASE         , 0x20020000    @ SRAM3(64 KB) base address in the alias region                              */
.EQU  SRAM1_BB_BASE      , 0x22000000    @ SRAM1(112 KB) base address in the bit-band region                          */
.EQU  SRAM2_BB_BASE      , 0x22380000    @ SRAM2(16 KB) base address in the bit-band region                           */
.EQU  SRAM3_BB_BASE      , 0x22400000    @ SRAM3(64 KB) base address in the bit-band region                           */
.EQU  PERIPH_BASE        , 0x40000000    @ Peripheral base address in the alias region                                */
.EQU  BKPSRAM_BASE       , 0x40024000    @ Backup SRAM(4 KB) base address in the alias region                         */
.EQU  FMC_R_BASE         , 0xA0000000    @ FMC registers base address                                                 */
.EQU  FSMC_BASE          , 0xA0000000
.EQU  CORE_BASE          , 0xE0000000
.EQU  DBGMCU_BASE        , 0xE0042000    @  Debug MCU registers base address
.EQU  USB_OTG_HS_PERIPH_BASE, 0x40040000    @ USB registers base address
.EQU  USB_OTG_FS_PERIPH_BASE, 0x50000000
@.END

@.ITEM     CCMDATARAM_BASE
.EQU  CCMDATARAM_END     , 0x1000FFFF    @ CCM data RAM end address                                                   */
@.END

@.ITEM  FLASH_BASE
.EQU  FLASH_END          , 0x081FFFFF    @ FLASH end address                                                          */
.EQU  FLASH_OTP_BASE     , 0x1FFF7800    @ Base address of : (up to 528 Bytes) embedded FLASH OTP Area                */
.EQU  FLASH_OTP_END      , 0x1FFF7A0F    @ End address of : (up to 528 Bytes) embedded FLASH OTP Area                 */
@.END

@.ITEM     FMC_R_BASE @ FMC Bankx registers base address
.EQU  FMC_Bank1_R_BASE   , FMC_R_BASE + 0x0000
.EQU  FMC_Bank1E_R_BASE  , FMC_R_BASE + 0x0104
.EQU  FMC_Bank2_3_R_BASE , FMC_R_BASE + 0x0060
.EQU  FMC_Bank4_R_BASE   , FMC_R_BASE + 0x00A0
.EQU  FMC_Bank5_6_R_BASE , FMC_R_BASE + 0x0140
@.END

@.ITEM     CORE_BASE
.EQU  SYSTICK_BASE       , 0xE000E010
.EQU  NVIC1_BASE         , 0xE000E100
.EQU  SCB_BASE           , 0xE000ED00
.EQU  FPU_ACC_BASE       , 0xE000ED88
.EQU  MEMPROTECT_BASE    , 0xE000ED90
.EQU  NVIC2_BASE         , 0xE000EF00
.EQU  FPU_BASE           , 0xE000EF30
@.END

@.ITEM     PERIPH_BASE
.EQU  PERIPH_BB_BASE     , 0x02000000    @  Peripheral base address in the bit-band region                             */
.EQU  APB1PERIPH_BASE    , PERIPH_BASE
.EQU  APB2PERIPH_BASE    , PERIPH_BASE + 0x00010000
.EQU  AHB1PERIPH_BASE    , PERIPH_BASE + 0x00020000
.EQU  AHB2PERIPH_BASE    , PERIPH_BASE + 0x10000000
@.END

@.ITEM    BKPSRAM_BASE
.EQU  BKPSRAM_BB_BASE    , 0x42480000    @ Backup SRAM(4 KB) base address in the bit-band region                      */
@.END


