@.CHARSET =CP1251
@GNU AS

.SYNTAX   unified                 @   
.THUMB                              @    Thumb
.CPU       cortex-m4                @ 

.INCLUDE   "/src/inc/rcc.inc"
.INCLUDE   "/src/inc/gpio.inc"
.INCLUDE   "/src/inc/tim2-5.inc"

.SECTION   .asmcode

@  
.GLOBAL    Start
Start:
                   @   
                         BL          SYSCLK84_START         @    84 
                         BL          SYSTICK_START          @  SysTick 1000 

.INCLUDE   "/src/periph/rcc/rcc_ahb1enr_gpio_set.inc"
.INCLUDE   "/src/periph/gpio/gpio_a_conf.inc"

                         MOV         R1, 1

                         LDR         R2, = PERIPH_BB_BASE + ( RCC_BASE + RCC_APB1ENR ) * 32 + RCC_APB1ENR_TIM3EN_N * 4    @   Timer 3
                         STR         R1, [ R2 ]

                     @   Timer 3
                         LDR         R2, = TIM3

                         LDR         R0, =  420-1                             @     42Mhz / 420 = 100 
                         STR         R0, [ R2, TIM2T5_PSC ]

                         LDR         R0, = 100                                 @   
                         STR         R0, [ R2, TIM2T5_ARR ]

                         LDR         R0, = TIM2T5_CR1_CEN + TIM2T5_CR1_APRE    @  
                         STR         R0, [ R2, TIM2T5_CR1 ]

                     @   
                         LDR         R0, = TIM2T5_CCMR1_OC1M_PWM1              @  pwm 1
                         STR         R0, [ R2, TIM2T5_CCMR1 ]

                         LDR         R0, = 100                                 @  
                         STR         R0, [ R2, TIM2T5_CCR1 ]

                         LDR         R0, = TIM2T5_CCER_CC1E                    @    CH1
                         STR         R0, [ R2, TIM2T5_CCER ]

                     @    
                         MOV         R3, 1
                         MOV         R4, 1

MAIN_LOOP:
                         ADD         R3, R3, R4
                         AND         R3, R3, 0xFF

                         CMP         R3, 1                     @    
                         IT          EQ
                         MOVEQ       R4, 1

                         CMP         R3, 100                    @    
                         IT          EQ
                         LDREQ       R4, =0xFFFFFFFF

                         STR         R3, [ R2, TIM2T5_CCR1 ]   @   

                         MOV         R0, 10
                         BL          SYSTICK_DELAY         @ 

                         B           MAIN_LOOP


